Vikram Sekar arrives at Hot Chips 2026 with a rare, granular dissection of the memory landscape, cutting through the usual marketing fog to reveal a stark truth: the industry's next leap isn't just about stacking more chips, but about fundamentally rethinking the silicon beneath them. While most coverage fixates on capacity numbers, Sekar's analysis exposes a critical divergence in strategy among the top three players, where the ability to manufacture custom logic dies may soon matter more than the memory itself.
The Memory Wall and the Missing Roadmap
Sekar opens his critique by addressing the elephant in the room: the presentation from Micron, the world's largest memory maker, felt surprisingly hollow compared to its rivals. He notes that the talk relied heavily on "the memory wall, standard roofline curves, and how stacking enables high memory bandwidth," arguing that for an audience deeply invested in artificial intelligence, this is "not news." The author's frustration is palpable when he points out the absence of a forward-looking strategy for higher stacks or advanced cooling, suggesting Micron may be reacting to market de-escalation rather than leading it.
The most damning observation in Sekar's coverage concerns reliability. He highlights that High Bandwidth Memory (HBM) has become a primary failure point in AI training runs. "HBM is the 2nd most important root cause of training-run interruptions, apart from the GPU being faulty itself," he writes, citing a study that places software and networking behind it. This statistic reframes the entire industry's obsession with capacity; if the memory stack is the second most likely thing to crash a multi-million dollar training job, then reliability and thermal management are not just engineering details—they are existential business risks.
Critics might argue that Micron's conservative approach reflects a prudent response to uncertain demand, but Sekar suggests it signals a deeper strategic gap. By failing to address custom base dies or advanced cooling solutions, Micron risks ceding the architectural innovation that will define the next generation of AI accelerators.
HBM has a lot more technical metrics that matter to performance than meets the eye on marketing slides.
The Logic Node Advantage
The narrative shifts dramatically when Sekar turns to Samsung, whose presentation he describes as a masterclass in vertical integration. The core of Samsung's argument rests on a single, powerful advantage: unlike its competitors, it manufactures its own advanced logic nodes. This allows them to replace the standard memory-based base die with a sophisticated logic die, a move Sekar calls a "silent dig at Micron."
Sekar breaks down the implications of this shift, explaining how moving the memory controller and other functions to a custom logic base die frees up valuable space on the main processor. "Increases the area in XPU for more compute," he notes, quoting the presentation's logic. This isn't just about efficiency; it's about repurposing silicon real estate for higher performance. He further illustrates the ingenuity of this approach by describing how Samsung plans to use the logic die as a "spare notebook" to store data from defective memory cells, effectively turning a manufacturing flaw into a manageable software issue.
The author also touches on the historical context of these packaging challenges. Just as the industry struggled with Through-Silicon Vias (TSV) to connect layers vertically, the move to hybrid bonding and custom logic dies represents a similar paradigm shift in how chips communicate. Sekar argues that this integration is so critical that it remains relevant even if stack heights decrease, decoupling performance gains from the sheer volume of memory stacked.
However, a counterargument worth considering is whether the complexity of managing a logic die underneath the memory stack introduces new failure modes or thermal bottlenecks that could negate the performance gains. Sekar acknowledges the thermal density issues but suggests Samsung's integrated Heat Path Block (HPB) is a viable solution, though the long-term reliability of such dense integration remains to be proven in the field.
Samsung's clear advantage is that they have a logic node in-house unlike Micron and SK Hynix who need to partner with somebody to get it.
The End of the Secret Sauce
The final act of Sekar's analysis focuses on SK Hynix, the current market leader in HBM, and the potential erosion of its competitive moat. For years, SK Hynix has dominated through its Mass-Reflow Mold-UnderFill (MR-MUF) technique, a proprietary method that offers superior thermal performance. But Sekar warns that this advantage is fragile. "When hybrid bonding is used, the 'secret sauce' of SK Hynix with MRMUF is no more, and everybody's hybrid bonded HBM falls to the same level," he writes.
This observation is crucial because it suggests that the future of the market will be decided not by who has the best proprietary bonding fluid, but by who can execute the most complex manufacturing processes at scale. Sekar points to a telling omission in Micron's strategy: while competitors like Samsung and SK Hynix have developed external cooling blocks, Micron claims it will simply "improve circuit design." Sekar finds this explanation unconvincing, noting that if it were that simple, the other leaders would be doing it too.
The author also weaves in the broader economic reality, referencing the high cost of memory which now exceeds half the price of a full AI rack. This financial pressure is driving a trend toward "de-specing" HBM, reducing stack heights from 12 or 16 to perhaps 8 or even 4. In this environment, the ability to maintain performance with fewer layers becomes paramount, further validating Samsung's push for logic-based base dies that can boost bandwidth per pin regardless of stack height.
If that were the case, Samsung and SK Hynix would be doing it too instead of external cooling blocks.
Bottom Line
Sekar's coverage succeeds by stripping away the hype of capacity numbers to reveal the true battleground: the architecture of the base die and the thermal engineering required to sustain it. The strongest part of his argument is the identification of custom logic nodes as the new differentiator, a shift that favors vertically integrated giants like Samsung over pure-play memory makers. His biggest vulnerability, however, lies in the assumption that the industry will fully embrace hybrid bonding and 20-high stacks; if the market pivots to lower-cost, lower-stack solutions, the complexity of Samsung's approach could become a liability rather than an asset. Readers should watch closely for how quickly the industry adopts these new cooling and logic-integration strategies, as they will likely determine the winners of the next AI cycle.